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Challenges in integration of metal gate high-k dielectrics gate stacks

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dc.contributor.authorTsai, W.
dc.contributor.authorRagnarsson, Lars-Ake
dc.contributor.authorSchram, Tom
dc.contributor.authorDe Gendt, Stefan
dc.contributor.authorHeyns, Marc
dc.contributor.imecauthorRagnarsson, Lars-Ake
dc.contributor.imecauthorSchram, Tom
dc.contributor.imecauthorDe Gendt, Stefan
dc.contributor.imecauthorHeyns, Marc
dc.contributor.orcidimecRagnarsson, Lars-Ake::0000-0003-1057-8140
dc.contributor.orcidimecDe Gendt, Stefan::0000-0003-3775-3578
dc.date.accessioned2021-10-15T16:43:31Z
dc.date.available2021-10-15T16:43:31Z
dc.date.embargo9999-12-31
dc.date.issued2004
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/9692
dc.source.beginpage321
dc.source.conferenceAdvanced Short-Time Thermal Processing for Si-Based CMOS Devices II
dc.source.conferencedate9/05/2004
dc.source.conferencelocationSan Antonio, TX USA
dc.source.endpage327
dc.title

Challenges in integration of metal gate high-k dielectrics gate stacks

dc.typeProceedings paper
dspace.entity.typePublication
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