Carbon Nanotube SRAM in 5-nm Technology Node Design, Optimization, and Performance Evaluation--Part I: CNFET Transistor Optimization

Chen, Rongmei; Chen, Lin; Liang, Jie; Cheng, Yuanqing; Elloumi, Souhir; Lee, Jaehyun; Xu, Kangwei; Georgiev, Vihar P.; Ni, Kai; Debacker, Peter; Asenov, Asen; Todri-Sanial, Aida

doi:10.1109/TVLSI.2022.3146125

Publication:

Carbon Nanotube SRAM in 5-nm Technology Node Design, Optimization, and Performance Evaluation--Part I: CNFET Transistor Optimization

Date

2022

Journal article

https://doi.org/10.1109/TVLSI.2022.3146125

Simple item page Full metadata Statistics

Files

Accepted version 1.86 MB

Author(s)

;

;

;

;

;

;

;

;

;

;

;

Journal

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

Metrics

1038 since deposited on 2023-05-04

190last month

39last week

Acq. date: 2025-12-10

1415 since deposited on 2023-05-04

Acq. date: 2025-12-10

Carbon Nanotube SRAM in 5-nm Technology Node Design, Optimization, and Performance Evaluation--Part I: CNFET Transistor Optimization

Date

Files

Author(s)

Journal

Abstract

Description

Metrics

Downloads

Views

Citations

Metrics

Downloads

Views

Citations