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Dual-channel technology with Cap-free single metal gate for high performance CMOS in gate-first and gate-last integration
Publication:
Dual-channel technology with Cap-free single metal gate for high performance CMOS in gate-first and gate-last integration
Date
2011
Proceedings Paper
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APA
Chicago
Harvard
IEEE
Basic data
APA
Chicago
Harvard
IEEE
Author(s)
Witters, Liesbeth
;
Mitard, Jerome
;
Veloso, Anabela
;
Hikavyy, Andriy
;
Franco, Jacopo
;
Kauerauf, Thomas
;
Cho, Moon Ju
;
Schram, Tom
;
Sebaai, Farid
;
Yamaguchi, Shinpei
;
Takeoka, S.
;
Fukuda, Masahiro
;
Wang, Wei-E
;
Duriez, Blandine
;
Eneman, Geert
;
Loo, Roger
;
Kellens, Kristof
;
Tielens, Hilde
;
Favia, Paola
;
Rohr, Erika
;
Hellings, Geert
;
Bender, Hugo
;
Roussel, Philippe
;
Crabbe, Yvo
;
Brus, Stephan
;
Mannaert, Geert
;
Kubicek, Stefan
;
Devriendt, Katia
;
De Meyer, Kristin
;
Ragnarsson, Lars-Ake
;
Steegen, An
;
Horiguchi, Naoto
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1
since deposited on 2021-10-19
Acq. date: 2025-10-23
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2031
since deposited on 2021-10-19
Acq. date: 2025-10-23
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