Publication:

Understanding charge traps for optimizing Si-passivated Ge nMOSFETs

Date

2016
Proceedings Paper
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dc.contributor.authorRen, Pengpeng
dc.contributor.authorGao, R.
dc.contributor.authorJi, Zhigang
dc.contributor.authorArimura, Hiroaki
dc.contributor.authorZhang, J. F.
dc.contributor.authorWang, R.
dc.contributor.authorDuan, M.
dc.contributor.authorZhang, W.
dc.contributor.authorFranco, Jacopo
dc.contributor.authorSioncke, Sonja
dc.contributor.authorCott, Daire
dc.contributor.authorMitard, Jerome
dc.contributor.authorWitters, Liesbeth
dc.contributor.authorMertens, Hans
dc.contributor.authorKaczer, Ben
dc.contributor.authorMocuta, Anda
dc.contributor.authorCollaert, Nadine
dc.contributor.authorLinten, Dimitri
dc.contributor.authorHuang, R.
dc.contributor.authorThean, Aaron
dc.contributor.imecauthorArimura, Hiroaki
dc.contributor.imecauthorFranco, Jacopo
dc.contributor.imecauthorCott, Daire
dc.contributor.imecauthorMitard, Jerome
dc.contributor.imecauthorWitters, Liesbeth
dc.contributor.imecauthorMertens, Hans
dc.contributor.imecauthorKaczer, Ben
dc.contributor.imecauthorCollaert, Nadine
dc.contributor.imecauthorLinten, Dimitri
dc.contributor.imecauthorThean, Aaron
dc.contributor.imecauthorGroeseneken, Guido
dc.contributor.orcidimecFranco, Jacopo::0000-0002-7382-8605
dc.contributor.orcidimecMitard, Jerome::0000-0002-7422-079X
dc.contributor.orcidimecKaczer, Ben::0000-0002-1484-4007
dc.contributor.orcidimecCollaert, Nadine::0000-0002-8062-3165
dc.contributor.orcidimecLinten, Dimitri::0000-0001-8434-1838
dc.contributor.orcidimecGroeseneken, Guido::0000-0003-3763-2098
dc.date.accessioned2021-10-23T14:08:18Z
dc.date.available2021-10-23T14:08:18Z
dc.date.embargo9999-12-31
dc.date.issued2016
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/27204
dc.identifier.urlhttp://ieeexplore.ieee.org/document/7573367/?tp=&arnumber=7573367
dc.source.beginpage32
dc.source.conferenceIEEE Symposium on VLSI technology
dc.source.conferencedate13/06/2016
dc.source.conferencelocationHonolulu, HI USA
dc.source.endpage33
dc.title

Understanding charge traps for optimizing Si-passivated Ge nMOSFETs

dc.typeProceedings paper
dspace.entity.typePublication
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