Publication:
Junction anneal sequence optimization for advanced high-k / metal gate CMOS technology
Date
| dc.contributor.author | Ortolland, Claude | |
| dc.contributor.author | Ragnarsson, Lars-Ake | |
| dc.contributor.author | Kerner, Christoph | |
| dc.contributor.author | Chiarella, Thomas | |
| dc.contributor.author | Rosseel, Erik | |
| dc.contributor.author | Okuno, Yasutoshi | |
| dc.contributor.author | Favia, Paola | |
| dc.contributor.author | Richard, Olivier | |
| dc.contributor.author | Everaert, Jean-Luc | |
| dc.contributor.author | Schram, Tom | |
| dc.contributor.author | Kubicek, Stefan | |
| dc.contributor.author | Absil, Philippe | |
| dc.contributor.author | Biesemans, Serge | |
| dc.contributor.author | Schreutelkamp, Robert | |
| dc.contributor.author | Hoffmann, Thomas Y. | |
| dc.contributor.imecauthor | Ragnarsson, Lars-Ake | |
| dc.contributor.imecauthor | Kerner, Christoph | |
| dc.contributor.imecauthor | Chiarella, Thomas | |
| dc.contributor.imecauthor | Rosseel, Erik | |
| dc.contributor.imecauthor | Favia, Paola | |
| dc.contributor.imecauthor | Richard, Olivier | |
| dc.contributor.imecauthor | Everaert, Jean-Luc | |
| dc.contributor.imecauthor | Schram, Tom | |
| dc.contributor.imecauthor | Kubicek, Stefan | |
| dc.contributor.imecauthor | Absil, Philippe | |
| dc.contributor.imecauthor | Biesemans, Serge | |
| dc.contributor.orcidimec | Ragnarsson, Lars-Ake::0000-0003-1057-8140 | |
| dc.contributor.orcidimec | Chiarella, Thomas::0000-0002-6155-9030 | |
| dc.contributor.orcidimec | Favia, Paola::0000-0002-1019-3497 | |
| dc.contributor.orcidimec | Richard, Olivier::0000-0002-3994-8021 | |
| dc.date.accessioned | 2021-10-18T01:19:48Z | |
| dc.date.available | 2021-10-18T01:19:48Z | |
| dc.date.issued | 2009 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/15952 | |
| dc.source.conference | 9th International Workshop on Junction Technology - IWJT | |
| dc.source.conferencedate | 11/06/2009 | |
| dc.source.conferencelocation | Kyoto Japan | |
| dc.title | Junction anneal sequence optimization for advanced high-k / metal gate CMOS technology | |
| dc.type | Proceedings paper | |
| dspace.entity.type | Publication | |
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