Publication:

A 42 mW 200 fs-jitter 60 GHz sub-sampling PLL in 40 nm CMOS

Date

Loading...
Thumbnail Image

Abstract

Description

Metrics

Views

1984 since deposited on 2021-10-22
Acq. date: 2025-12-12

Citations

Metrics

Views

1984 since deposited on 2021-10-22
Acq. date: 2025-12-12

Citations