IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Abstract
This paper presents a design procedure for asynchronous sigma-delta modulators (ASDMs) that exploits distortion cancellation between the quantizer and the input path. By accurately matching the expansive nonlinearity of the quantizer to the compressive nonlinearity of the input path, the presented procedure relaxes input path linearity requirements, enabling power-efficient high-bandwidth designs. To support this procedure, a novel analytical model for first-order delay-based ASDMs is introduced that accurately characterizes the quantizer nonlinearity as a function of the loop filter corner frequency. Prior models assume a corner frequency much smaller than the self-oscillation frequency, limiting their applicability. The procedure is validated through the design of a 28 nm CMOS prototype. Operating at a self-oscillation frequency of 7.2 GHz, the prototype demonstrates distortion cancellation across a wide input amplitude range for frequencies within the loop filter bandwidth, while consuming only 3.1 mW from a 0.9 V supply.
