Publication:

Clock tree optimization in synchronous CMOS digital circuits for substrate noise reduction using folding of supply current transients

Date

Loading...
Thumbnail Image

Abstract

Description

Metrics

Views

1925 since deposited on 2021-10-14
Acq. date: 2025-10-27

Citations

Metrics

Views

1925 since deposited on 2021-10-14
Acq. date: 2025-10-27

Citations