Skip to content
Institutional repository
Communities & Collections
Browse
Site
Log In
imec Publications
Articles
Alleviation of Negative-Bias Temperature Instability in Si p-FinFETs With ALD W Gate-Filling Metal by Annealing Process Optimization
Publication:
Alleviation of Negative-Bias Temperature Instability in Si p-FinFETs With ALD W Gate-Filling Metal by Annealing Process Optimization
Date
2021
Journal article
https://doi.org/10.1109/JEDS.2021.3057662
Simple item page
Full metadata
Statistics
Loading...
Loading...
Files
Published version
2.25 MB
Basic data
APA
Chicago
Harvard
IEEE
Basic data
APA
Chicago
Harvard
IEEE
Author(s)
Zhou, Longda
;
Liu, Qianqian
;
Yang, Hong
;
Ji, Zhigang
;
Xu, Hao
;
Wang, Guilei
;
Simoen, Eddy
;
Jiang, Haojie
;
Luo, Ying
;
Kong, Zhenzhen
;
Bai, Guobin
;
Luo, Jun
;
Yin, Huaxiang
;
Zhao, Chao
;
Wang, Wenwu
Journal
IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY
Abstract
Description
Metrics
Downloads
290
since deposited on 2021-11-02
Acq. date: 2025-10-23
Views
1656
since deposited on 2021-11-02
Acq. date: 2025-10-23
Citations
Metrics
Downloads
290
since deposited on 2021-11-02
Acq. date: 2025-10-23
Views
1656
since deposited on 2021-11-02
Acq. date: 2025-10-23
Citations