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Multidie 3-D Stacking of Memory Dominated Neuromorphic Architectures

 
dc.contributor.authorGiacomini Rocha, Leandro M.
dc.contributor.authorBilgic, Refik
dc.contributor.authorNaeim, Mohamed
dc.contributor.authorDas, Sudipta
dc.contributor.authorOprins, Herman
dc.contributor.authorYousefzadeh, Amirreza
dc.contributor.authorKonijnenburg, Mario
dc.contributor.authorMilojevic, Dragomir
dc.contributor.authorMyers, James
dc.contributor.authorRyckaert, Julien
dc.contributor.authorBiswas, Dwaipayan
dc.contributor.imecauthorBilgic, Refik
dc.contributor.imecauthorNaeim, Mohamed
dc.contributor.imecauthorDas, Sudipta
dc.contributor.imecauthorOprins, Herman
dc.contributor.imecauthorKonijnenburg, Mario
dc.contributor.imecauthorMilojevic, Dragomir
dc.contributor.imecauthorRyckaert, Julien
dc.contributor.imecauthorBiswas, Dwaipayan
dc.contributor.imecauthorGiacomini Rocha, Leandro M.
dc.contributor.imecauthorMyers, James
dc.contributor.orcidimecBilgic, Refik::0009-0007-9031-2735
dc.contributor.orcidimecDas, Sudipta::0009-0007-2998-9827
dc.contributor.orcidimecOprins, Herman::0000-0003-0680-4969
dc.contributor.orcidimecKonijnenburg, Mario::0000-0001-8016-0888
dc.contributor.orcidimecBiswas, Dwaipayan::0000-0002-1087-3433
dc.contributor.orcidimecGiacomini Rocha, Leandro M.::0000-0003-2883-2768
dc.date.accessioned2025-04-30T10:01:51Z
dc.date.available2024-08-05T18:18:28Z
dc.date.available2025-04-30T10:01:51Z
dc.date.issued2024
dc.identifier.doi10.1109/TVLSI.2024.3421625
dc.identifier.issn1063-8210
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/44268
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
dc.source.beginpage2144
dc.source.endpage2148
dc.source.issue11
dc.source.journalIEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
dc.source.numberofpages5
dc.source.volume32
dc.title

Multidie 3-D Stacking of Memory Dominated Neuromorphic Architectures

dc.typeJournal article
dspace.entity.typePublication
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