Publication:

Low-voltage 6T FinFET SRAM cell with high SNM using HfSiON/TiN gate stack, fin widths down to 10nm and 30nm gate length

Date

2008
Proceedings Paper
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dc.contributor.authorCollaert, Nadine
dc.contributor.authorvon Arnim, Klaus
dc.contributor.authorRooyackers, Rita
dc.contributor.authorVandeweyer, Tom
dc.contributor.authorMercha, Abdelkarim
dc.contributor.authorParvais, Bertrand
dc.contributor.authorWitters, Liesbeth
dc.contributor.authorNackaerts, Axel
dc.contributor.authorAltamirano Sanchez, Efrain
dc.contributor.authorDemand, Marc
dc.contributor.authorHikavyy, Andriy
dc.contributor.authorDemuynck, Steven
dc.contributor.authorDevriendt, Katia
dc.contributor.authorBauer, F.
dc.contributor.authorFerain, Isabelle
dc.contributor.authorVeloso, Anabela
dc.contributor.authorDe Meyer, Kristin
dc.contributor.authorBiesemans, Serge
dc.contributor.authorJurczak, Gosia
dc.contributor.imecauthorCollaert, Nadine
dc.contributor.imecauthorVandeweyer, Tom
dc.contributor.imecauthorMercha, Abdelkarim
dc.contributor.imecauthorParvais, Bertrand
dc.contributor.imecauthorWitters, Liesbeth
dc.contributor.imecauthorAltamirano Sanchez, Efrain
dc.contributor.imecauthorDemand, Marc
dc.contributor.imecauthorHikavyy, Andriy
dc.contributor.imecauthorDemuynck, Steven
dc.contributor.imecauthorDevriendt, Katia
dc.contributor.imecauthorVeloso, Anabela
dc.contributor.imecauthorDe Meyer, Kristin
dc.contributor.imecauthorBiesemans, Serge
dc.contributor.imecauthorJurczak, Gosia
dc.contributor.orcidimecCollaert, Nadine::0000-0002-8062-3165
dc.contributor.orcidimecMercha, Abdelkarim::0000-0002-2174-6958
dc.contributor.orcidimecParvais, Bertrand::0000-0003-0769-7069
dc.contributor.orcidimecHikavyy, Andriy::0000-0002-8201-075X
dc.contributor.orcidimecDevriendt, Katia::0000-0002-0662-7926
dc.date.accessioned2021-10-17T06:36:04Z
dc.date.available2021-10-17T06:36:04Z
dc.date.embargo9999-12-31
dc.date.issued2008
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/13548
dc.source.beginpage59
dc.source.conferenceIEEE International Conference on IC Design and Technology - ICICDT
dc.source.conferencedate2/06/2008
dc.source.conferencelocationGrenoble France
dc.source.endpage62
dc.title

Low-voltage 6T FinFET SRAM cell with high SNM using HfSiON/TiN gate stack, fin widths down to 10nm and 30nm gate length

dc.typeProceedings paper
dspace.entity.typePublication
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