Publication:

Channel engineering and junction overlap issues for ultra-shallow junctions formed by SPER in the 45 nm CMOS technology node

Date

2004-04
Proceedings Paper
Simple item page Full metadata Statistics
 
dc.contributor.authorSeveri, Simone
dc.contributor.authorHenson, Kirklen
dc.contributor.authorLindsay, Richard
dc.contributor.authorLauwers, Anne
dc.contributor.authorPawlak, Bartek
dc.contributor.authorSurdeanu, Radu
dc.contributor.authorDe Meyer, Kristin
dc.contributor.imecauthorSeveri, Simone
dc.contributor.imecauthorLauwers, Anne
dc.contributor.imecauthorPawlak, Bartek
dc.contributor.imecauthorDe Meyer, Kristin
dc.date.accessioned2021-10-15T16:09:40Z
dc.date.available2021-10-15T16:09:40Z
dc.date.issued2004-04
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/9580
dc.source.beginpage455
dc.source.conferenceSilicon Front-End Junction Formation - Physics and Technology
dc.source.conferencedate8/04/2004
dc.source.conferencelocationSan Francisco, CA USA
dc.source.endpage460
dc.title

Channel engineering and junction overlap issues for ultra-shallow junctions formed by SPER in the 45 nm CMOS technology node

dc.typeProceedings paper
dspace.entity.typePublication
Files
Publication available in collections:
Conference contributions