Publication:

Effective and Efficient Testing of Large Numbers of Inter-Die Interconnects in Chiplet-Based Multi-Die Packages

 
dc.contributor.authorChuang, Po-Yao
dc.contributor.authorLorenzelli, Francesco
dc.contributor.authorChakravarty, Sreejit
dc.contributor.authorWu, Cheng-Wen
dc.contributor.authorGielen, Georges
dc.contributor.authorMarinissen, Erik Jan
dc.contributor.imecauthorChuang, Po-Yao
dc.contributor.imecauthorLorenzelli, Francesco
dc.contributor.imecauthorMarinissen, Erik Jan
dc.contributor.orcidimecChuang, Po-Yao::0000-0001-7325-8836
dc.contributor.orcidimecLorenzelli, Francesco::0000-0001-6465-7157
dc.contributor.orcidimecMarinissen, Erik Jan::0000-0002-5058-8303
dc.date.accessioned2023-08-09T12:33:13Z
dc.date.available2023-07-24T17:10:22Z
dc.date.available2023-07-28T12:43:25Z
dc.date.available2023-08-09T12:33:13Z
dc.date.embargo9999-12-31
dc.date.issued2023
dc.identifier.doi10.1109/VTS56346.2023.10140006
dc.identifier.eisbn979-8-3503-4630-5
dc.identifier.issn1093-0167
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/42188
dc.publisherIEEE COMPUTER SOC
dc.source.conference41st IEEE VLSI Test Symposium (VTS)
dc.source.conferencedateAPR 24-26, 2023
dc.source.conferencelocationSan Diego
dc.source.journal2023 IEEE 41st VLSI Test Symposium (VTS)
dc.source.numberofpages6
dc.title

Effective and Efficient Testing of Large Numbers of Inter-Die Interconnects in Chiplet-Based Multi-Die Packages

dc.typeProceedings paper
dspace.entity.typePublication
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