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Patterning challenges in advanced device architectures: FinFETs to nanowire

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dc.contributor.authorHoriguchi, Naoto
dc.contributor.authorMilenin, Alexey
dc.contributor.authorTao, Zheng
dc.contributor.authorHody, Hubert
dc.contributor.authorAltamirano Sanchez, Efrain
dc.contributor.authorVeloso, Anabela
dc.contributor.authorWitters, Liesbeth
dc.contributor.authorWaldron, Niamh
dc.contributor.authorRagnarsson, Lars-Ake
dc.contributor.authorKim, Min-Soo
dc.contributor.authorKikuchi, Yoshiaki
dc.contributor.authorMertens, Hans
dc.contributor.authorRaghavan, Praveen
dc.contributor.authorPiumi, Daniele
dc.contributor.authorCollaert, Nadine
dc.contributor.authorBarla, Kathy
dc.contributor.authorThean, Aaron
dc.contributor.imecauthorHoriguchi, Naoto
dc.contributor.imecauthorMilenin, Alexey
dc.contributor.imecauthorTao, Zheng
dc.contributor.imecauthorHody, Hubert
dc.contributor.imecauthorAltamirano Sanchez, Efrain
dc.contributor.imecauthorVeloso, Anabela
dc.contributor.imecauthorWitters, Liesbeth
dc.contributor.imecauthorWaldron, Niamh
dc.contributor.imecauthorRagnarsson, Lars-Ake
dc.contributor.imecauthorKim, Min-Soo
dc.contributor.imecauthorKikuchi, Yoshiaki
dc.contributor.imecauthorMertens, Hans
dc.contributor.imecauthorPiumi, Daniele
dc.contributor.imecauthorCollaert, Nadine
dc.contributor.imecauthorBarla, Kathy
dc.contributor.imecauthorThean, Aaron
dc.contributor.orcidimecHoriguchi, Naoto::0000-0001-5490-0416
dc.contributor.orcidimecMilenin, Alexey::0000-0003-0747-0462
dc.contributor.orcidimecRagnarsson, Lars-Ake::0000-0003-1057-8140
dc.contributor.orcidimecKim, Min-Soo::0000-0003-0211-0847
dc.contributor.orcidimecCollaert, Nadine::0000-0002-8062-3165
dc.date.accessioned2021-10-23T11:19:08Z
dc.date.available2021-10-23T11:19:08Z
dc.date.embargo9999-12-31
dc.date.issued2016
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/26735
dc.identifier.urlhttp://proceedings.spiedigitallibrary.org/proceeding.aspx?articleid=2506645
dc.source.beginpage978209
dc.source.conferenceAdvanced Etch Technology for Nanopatterning V
dc.source.conferencedate22/02/2016
dc.source.conferencelocationSan Jose, CA USA
dc.title

Patterning challenges in advanced device architectures: FinFETs to nanowire

dc.typeProceedings paper
dspace.entity.typePublication
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