Publication:

3D Integration: Circuit design, test and reliability challenges

Date

2010
Proceedings Paper
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dc.contributor.authorMinas, Nikolaos
dc.contributor.authorDe Wolf, Ingrid
dc.contributor.authorMarinissen, Erik Jan
dc.contributor.authorStucchi, Michele
dc.contributor.authorOprins, Herman
dc.contributor.authorMercha, Abdelkarim
dc.contributor.authorVan der Plas, Geert
dc.contributor.authorVelenis, Dimitrios
dc.contributor.authorMarchal, Pol
dc.contributor.imecauthorDe Wolf, Ingrid
dc.contributor.imecauthorMarinissen, Erik Jan
dc.contributor.imecauthorStucchi, Michele
dc.contributor.imecauthorOprins, Herman
dc.contributor.imecauthorMercha, Abdelkarim
dc.contributor.imecauthorVan der Plas, Geert
dc.contributor.imecauthorVelenis, Dimitrios
dc.contributor.orcidimecDe Wolf, Ingrid::0000-0003-3822-5953
dc.contributor.orcidimecMarinissen, Erik Jan::0000-0002-5058-8303
dc.contributor.orcidimecOprins, Herman::0000-0003-0680-4969
dc.contributor.orcidimecMercha, Abdelkarim::0000-0002-2174-6958
dc.contributor.orcidimecVan der Plas, Geert::0000-0002-4975-6672
dc.date.accessioned2021-10-18T19:09:19Z
dc.date.available2021-10-18T19:09:19Z
dc.date.embargo9999-12-31
dc.date.issued2010
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/17633
dc.identifier.urlhttp://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=5560201
dc.source.beginpage217
dc.source.conference16th IEEE International On-Line Testing Symposium - IOLTS
dc.source.conferencedate5/07/2010
dc.source.conferencelocationCorfu Greece
dc.title

3D Integration: Circuit design, test and reliability challenges

dc.typeProceedings paper
dspace.entity.typePublication
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