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Influence of fin width on the intrinsic voltage gain of standard and strained triple-gate nFinFETs

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dc.contributor.authorPavanello, Marcelo Antonio
dc.contributor.authorMartino, Joao Antonio
dc.contributor.authorSimoen, Eddy
dc.contributor.authorRooyackers, Rita
dc.contributor.authorCollaert, Nadine
dc.contributor.authorClaeys, Cor
dc.contributor.imecauthorSimoen, Eddy
dc.contributor.imecauthorCollaert, Nadine
dc.contributor.orcidimecSimoen, Eddy::0000-0002-5218-4046
dc.contributor.orcidimecCollaert, Nadine::0000-0002-8062-3165
dc.date.accessioned2021-10-17T09:42:50Z
dc.date.available2021-10-17T09:42:50Z
dc.date.embargo9999-12-31
dc.date.issued2008
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/14291
dc.source.beginpage253
dc.source.conferenceMicroelectronics Technology and Devices - SBMicro
dc.source.conferencedate1/09/2008
dc.source.conferencelocationGramado Brazil
dc.source.endpage261
dc.title

Influence of fin width on the intrinsic voltage gain of standard and strained triple-gate nFinFETs

dc.typeProceedings paper
dspace.entity.typePublication
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