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Layout optimization and trade-off between 193i and EUV-based patterning for SRAM cells to improve performance and process variability at 7nm technology node

Date

2015
Proceedings Paper
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dc.contributor.authorSakhare, Sushil
dc.contributor.authorTrivkovic, Darko
dc.contributor.authorMountsier, Tom
dc.contributor.authorKim, Min-Soo
dc.contributor.authorMocuta, Dan
dc.contributor.authorRyckaert, Julien
dc.contributor.authorMercha, Abdelkarim
dc.contributor.authorVerkest, Diederik
dc.contributor.authorThean, Aaron
dc.contributor.authorDusa, Mircea
dc.contributor.imecauthorTrivkovic, Darko
dc.contributor.imecauthorMountsier, Tom
dc.contributor.imecauthorKim, Min-Soo
dc.contributor.imecauthorRyckaert, Julien
dc.contributor.imecauthorMercha, Abdelkarim
dc.contributor.imecauthorVerkest, Diederik
dc.contributor.imecauthorThean, Aaron
dc.contributor.imecauthorDusa, Mircea
dc.contributor.orcidimecKim, Min-Soo::0000-0003-0211-0847
dc.contributor.orcidimecMercha, Abdelkarim::0000-0002-2174-6958
dc.contributor.orcidimecVerkest, Diederik::0000-0001-6567-2746
dc.date.accessioned2021-10-22T22:28:59Z
dc.date.available2021-10-22T22:28:59Z
dc.date.issued2015
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/25852
dc.identifier.urlhttp://spie.org/Publications/Proceedings/Paper/10.1117/12.2086100
dc.source.beginpage94270O
dc.source.conferenceDesign-Process-Technology Co-optimization for Manufacturability IX
dc.source.conferencedate22/02/2015
dc.source.conferencelocationSan Jose, CA USA
dc.title

Layout optimization and trade-off between 193i and EUV-based patterning for SRAM cells to improve performance and process variability at 7nm technology node

dc.typeProceedings paper
dspace.entity.typePublication
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