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A new high-k/metal gate CMOS integration scheme (Diffusion and Gate Replacement) suppressing gate height asymmetry and compatible with high-thermal budget memory technologies

Date

2014
Proceedings Paper
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dc.contributor.authorRitzenthaler, Romain
dc.contributor.authorSchram, Tom
dc.contributor.authorSpessot, Alessio
dc.contributor.authorCaillat, Christian
dc.contributor.authorCho, Moon Ju
dc.contributor.authorSimoen, Eddy
dc.contributor.authorAoulaiche, Marc
dc.contributor.authorAlbert, Johan
dc.contributor.authorChew, Soon Aik
dc.contributor.authorNoh, Kyung Bong
dc.contributor.authorSon, Yunik
dc.contributor.authorFazan, Pierre
dc.contributor.authorHoriguchi, Naoto
dc.contributor.authorThean, Aaron
dc.contributor.imecauthorRitzenthaler, Romain
dc.contributor.imecauthorSchram, Tom
dc.contributor.imecauthorSpessot, Alessio
dc.contributor.imecauthorSimoen, Eddy
dc.contributor.imecauthorFazan, Pierre
dc.contributor.imecauthorHoriguchi, Naoto
dc.contributor.imecauthorThean, Aaron
dc.contributor.orcidimecRitzenthaler, Romain::0000-0002-8615-3272
dc.contributor.orcidimecSchram, Tom::0000-0003-1533-7055
dc.contributor.orcidimecSimoen, Eddy::0000-0002-5218-4046
dc.contributor.orcidimecHoriguchi, Naoto::0000-0001-5490-0416
dc.date.accessioned2021-10-22T05:07:17Z
dc.date.available2021-10-22T05:07:17Z
dc.date.embargo9999-12-31
dc.date.issued2014
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/24435
dc.source.beginpage772
dc.source.conferenceInternational Electron Devices Meeting - IEDM
dc.source.conferencedate15/12/2014
dc.source.conferencelocationSan Francisco, CA USA
dc.source.endpage775
dc.title

A new high-k/metal gate CMOS integration scheme (Diffusion and Gate Replacement) suppressing gate height asymmetry and compatible with high-thermal budget memory technologies

dc.typeProceedings paper
dspace.entity.typePublication
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