Publication:

Gate-last vs. gate-first technology for aggressively scaled EOT Logic/RF CMOS

Date

2011
Proceedings Paper
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dc.contributor.authorVeloso, Anabela
dc.contributor.authorRagnarsson, Lars-Ake
dc.contributor.authorCho, Moon Ju
dc.contributor.authorDevriendt, Katia
dc.contributor.authorKellens, Kristof
dc.contributor.authorSebaai, Farid
dc.contributor.authorSuhard, Samuel
dc.contributor.authorBrus, Stephan
dc.contributor.authorCrabbe, Yvo
dc.contributor.authorSchram, Tom
dc.contributor.authorRohr, Erika
dc.contributor.authorParaschiv, Vasile
dc.contributor.authorEneman, Geert
dc.contributor.authorKauerauf, Thomas
dc.contributor.authorDehan, Morin
dc.contributor.authorHong, Sug-Hun
dc.contributor.authorYamaguchi, Shinpei
dc.contributor.authorTakeoka, Shinji
dc.contributor.authorHiguchi, Yuichi
dc.contributor.authorTielens, Hilde
dc.contributor.imecauthorVeloso, Anabela
dc.contributor.imecauthorRagnarsson, Lars-Ake
dc.contributor.imecauthorDevriendt, Katia
dc.contributor.imecauthorKellens, Kristof
dc.contributor.imecauthorSebaai, Farid
dc.contributor.imecauthorSuhard, Samuel
dc.contributor.imecauthorBrus, Stephan
dc.contributor.imecauthorSchram, Tom
dc.contributor.imecauthorParaschiv, Vasile
dc.contributor.imecauthorEneman, Geert
dc.contributor.imecauthorTielens, Hilde
dc.contributor.imecauthorVan Ammel, Annemie
dc.contributor.imecauthorFavia, Paola
dc.contributor.imecauthorBender, Hugo
dc.contributor.imecauthorFranquet, Alexis
dc.contributor.imecauthorConard, Thierry
dc.contributor.imecauthorStruyf, Herbert
dc.contributor.imecauthorMertens, Paul
dc.contributor.imecauthorAbsil, Philippe
dc.contributor.imecauthorHoriguchi, Naoto
dc.contributor.orcidimecRagnarsson, Lars-Ake::0000-0003-1057-8140
dc.contributor.orcidimecDevriendt, Katia::0000-0002-0662-7926
dc.contributor.orcidimecSchram, Tom::0000-0003-1533-7055
dc.contributor.orcidimecEneman, Geert::0000-0002-5849-3384
dc.contributor.orcidimecFavia, Paola::0000-0002-1019-3497
dc.contributor.orcidimecFranquet, Alexis::0000-0002-7371-8852
dc.contributor.orcidimecConard, Thierry::0000-0002-4298-5851
dc.contributor.orcidimecHoriguchi, Naoto::0000-0001-5490-0416
dc.date.accessioned2021-10-19T20:56:03Z
dc.date.available2021-10-19T20:56:03Z
dc.date.embargo9999-12-31
dc.date.issued2011
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/20047
dc.source.beginpage34
dc.source.conferenceSymposium on VLSI Technology
dc.source.conferencedate13/06/2011
dc.source.conferencelocationKyoto Japan
dc.source.endpage35
dc.title

Gate-last vs. gate-first technology for aggressively scaled EOT Logic/RF CMOS

dc.typeProceedings paper
dspace.entity.typePublication
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