Publication:
Optimized process simulation of USJ for HKMG DRAM periphery transistors
Date
| dc.contributor.author | Spessot, Alessio | |
| dc.contributor.author | Caillat, Christian | |
| dc.contributor.author | Ritzenthaler, Romain | |
| dc.contributor.author | Schram, Tom | |
| dc.contributor.author | Fazan, Pierre | |
| dc.contributor.imecauthor | Spessot, Alessio | |
| dc.contributor.imecauthor | Ritzenthaler, Romain | |
| dc.contributor.imecauthor | Schram, Tom | |
| dc.contributor.imecauthor | Fazan, Pierre | |
| dc.contributor.orcidimec | Ritzenthaler, Romain::0000-0002-8615-3272 | |
| dc.contributor.orcidimec | Schram, Tom::0000-0003-1533-7055 | |
| dc.date.accessioned | 2021-10-22T06:05:56Z | |
| dc.date.available | 2021-10-22T06:05:56Z | |
| dc.date.embargo | 9999-12-31 | |
| dc.date.issued | 2014 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/24557 | |
| dc.identifier.url | http://ieeexplore.ieee.org/xpl/articleDetails.jsp?tp=&arnumber=6818722&queryText%3DUSJ+for+HKMG+DRAM+periphery+transistors | |
| dc.source.beginpage | 1 | |
| dc.source.conference | IEEE Workshop On Microelectronics And Electron Devices - WMED | |
| dc.source.conferencedate | 18/04/2014 | |
| dc.source.conferencelocation | Boise, ID USA | |
| dc.source.endpage | 4 | |
| dc.title | Optimized process simulation of USJ for HKMG DRAM periphery transistors | |
| dc.type | Proceedings paper | |
| dspace.entity.type | Publication | |
| Files | Original bundle
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| Publication available in collections: |