Publication:
3D Partitioning with Pipeline Optimization for Low-Latency Memory Access in Many-Core SoCs
| dc.contributor.author | Das, Sudipta | |
| dc.contributor.author | Riedel, Samuel | |
| dc.contributor.author | Bertuletti, Marco | |
| dc.contributor.author | Benini, Luca | |
| dc.contributor.author | Brunion, Moritz | |
| dc.contributor.author | Ryckaert, Julien | |
| dc.contributor.author | Myers, James | |
| dc.contributor.author | Biswas, Dwaipayan | |
| dc.contributor.author | Milojevic, Dragomir | |
| dc.contributor.imecauthor | Das, Sudipta | |
| dc.contributor.imecauthor | Brunion, Moritz | |
| dc.contributor.imecauthor | Ryckaert, Julien | |
| dc.contributor.imecauthor | Myers, James | |
| dc.contributor.imecauthor | Biswas, Dwaipayan | |
| dc.contributor.imecauthor | Milojevic, Dragomir | |
| dc.contributor.orcidimec | Das, Sudipta::0009-0007-2998-9827 | |
| dc.contributor.orcidimec | Brunion, Moritz::0000-0001-7842-7774 | |
| dc.contributor.orcidimec | Biswas, Dwaipayan::0000-0002-1087-3433 | |
| dc.date.accessioned | 2024-11-04T14:39:36Z | |
| dc.date.available | 2024-09-21T17:57:25Z | |
| dc.date.available | 2024-11-04T14:39:36Z | |
| dc.date.issued | 2024 | |
| dc.identifier.doi | 10.1109/ISCAS58744.2024.10558687 | |
| dc.identifier.eisbn | 979-8-3503-3099-1 | |
| dc.identifier.isbn | 979-8-3503-3100-4 | |
| dc.identifier.issn | 0271-4302 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/44549 | |
| dc.publisher | IEEE | |
| dc.source.conference | IEEE International Symposium on Circuits and Systems (ISCAS) | |
| dc.source.conferencedate | MAY 19-22, 2024 | |
| dc.source.conferencelocation | Singapore | |
| dc.source.journal | N/A | |
| dc.source.numberofpages | 5 | |
| dc.title | 3D Partitioning with Pipeline Optimization for Low-Latency Memory Access in Many-Core SoCs | |
| dc.type | Proceedings paper | |
| dspace.entity.type | Publication | |
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