Publication:

Drain Induced Barrier Widening and Reverse Short Channel Effects in Tunneling FETs: Investigation and Analysis

Date

2021
Journal article
https://doi.org/10.1109/ACCESS.2021.3125856
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dc.contributor.authorRam, Mamidala Karthik
dc.contributor.authorTiwari, Neha
dc.contributor.authorAbdi, Dawit
dc.contributor.authorSneh, Saurabh
dc.contributor.imecauthorAbdi, Dawit
dc.contributor.orcidimecAbdi, Dawit::0000-0002-3598-8798
dc.date.accessioned2021-12-07T09:07:15Z
dc.date.available2021-11-25T02:07:03Z
dc.date.available2021-12-07T08:53:13Z
dc.date.available2021-12-07T09:07:15Z
dc.date.issued2021
dc.identifier.doi10.1109/ACCESS.2021.3125856
dc.identifier.issn2169-3536
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/38468
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
dc.source.beginpage150366
dc.source.endpage150372
dc.source.issuena
dc.source.journalIEEE ACCESS
dc.source.numberofpages7
dc.source.volume9
dc.subject.keywordsGATE CMOS TECHNOLOGY
dc.subject.keywordsDUAL-METAL GATE
dc.subject.keywordsFIELD
dc.subject.keywordsVOLTAGE
dc.title

Drain Induced Barrier Widening and Reverse Short Channel Effects in Tunneling FETs: Investigation and Analysis

dc.typeJournal article
dspace.entity.typePublication
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