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The relationship between border traps characterized by AC admittance and BTI in III-V MOS devices
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The relationship between border traps characterized by AC admittance and BTI in III-V MOS devices
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Date
2015
Proceedings Paper
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Basic data
APA
Chicago
Harvard
IEEE
Basic data
APA
Chicago
Harvard
IEEE
Author(s)
Vais, Abhitosh
;
Martens, Koen
;
Franco, Jacopo
;
Lin, Dennis
;
Alian, AliReza
;
Roussel, Philippe
;
Sioncke, Sonja
;
Collaert, Nadine
;
Thean, Aaron
;
Heyns, Marc
;
Groeseneken, Guido
;
De Meyer, Kristin
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1759
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Acq. date: 2026-01-07
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Views
1759
since deposited on 2021-10-22
1
last month
Acq. date: 2026-01-07
Citations