Authors

Huynh Bao, Trong; Ryckaert, Julien; Tokei, Zsolt; Mercha, Abdelkarim; Verkest, Diederik; Thean, Aaron

Supervisor

Wambacq, Piet

ISSN

1063-8210

Issue

5

Journal

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volume

25

Title

Statistical timing analysis considering device and interconnect variability for BEOL requirements in the 5-nm node and beyond

Publication type

Journal article

Embargo date

9999-12-31