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12-EUV layer Surrounding Gate Transistor (SGT) for vertical 6-T SRAM: 5-nm-class technology for ultra-density logic devices
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Authors
Kim, Min-Soo
;
Harada, N.
;
Kikuchi, Yoshiaki
;
Boemmels, Juergen
;
Mitard, Jerome
;
Huynh Bao, Trong
;
Matagne, Philippe
;
Tao, Zheng
;
Li, Waikin
;
Devriendt, Katia
;
Ragnarsson, Lars-Ake
;
Lorant, Christophe
;
Sebaai, Farid
;
Porret, Clément
;
Rosseel, Erik
;
Dangol, Anish
;
Batuk, Dmitry
;
Martinez Alanis, Gerardo Tadeo
;
Geypen, Jef
;
Jourdan, Nicolas
;
Sepulveda Marquez, Alfonso
;
Puliyalil, Harinarayanan
;
Jamieson, Geraldine
;
van der Veen, Marleen
;
Teugels, Lieve
;
El-Mekki, Zaid
;
Altamirano Sanchez, Efrain
;
Li, Y.
;
Nakamura, H.
;
Mocuta, Dan
;
Matsuoka, F.
Conference
2019 Symposium on VLSI Technology
Title
12-EUV layer Surrounding Gate Transistor (SGT) for vertical 6-T SRAM: 5-nm-class technology for ultra-density logic devices
Publication type
Proceedings paper
Embargo date
9999-12-31
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