Now showing items 1-6 of 6

    • 3D-optimized SRAM Macro Design and Application to Memory-on-Logic 3D-IC at Advanced Nodes 

      Chen, Rongmei; Weckx, Pieter; Salahuddin, Shairfe Muhammad; Kim, Soon-Wook; Sisto, Giuliano; Van der Plas, Geert; Stucchi, Michele; Baert, Rogier; Debacker, Peter; Na, Myung Hee; Ryckaert, Julien; Milojevic, Dragomir; Beyne, Eric (2020)
    • Buried Power Rail Scaling and Metal Assessment for the 3 nm Node and Beyond 

      Gupta, Anshul; Varela Pedreira, Olalla; Tao, Zheng; Mertens, Hans; Radisic, Dunja; Jourdan, Nicolas; Devriendt, Katia; Heylen, Nancy; Wang, Shouhua; Chehab, Bilal; Jang, Doyoung; Hellings, Geert; Sebaai, Farid; Lorant, Christophe; Teugels, Lieve; Peter, Antony; Chan, BT; Schleicher, Filip; Demonie, Ingrid; Marien, Philippe; Sepulveda Marquez, Alfonso; Richard, Olivier; Nagesh, Nishanth; Lesniewska, Alicja; Lazzarino, Frederic; Ryckaert, Julien; Morin, Pierre; Altamirano Sanchez, Efrain; Murdoch, Gayle; Boemmels, Juergen; Demuynck, Steven; Na, Myung Hee; Tokei, Zsolt; Biesemans, Serge; Dentoni Litta, Eugenio; Horiguchi, Naoto (2020)
    • Buried power SRAM DTCO and system-level benchmarking in N3 

      Salahuddin, Shairfe Muhammad; Perumkunnil, Manu; Dentoni Litta, Eugenio; Gupta, Anshul; Weckx, Pieter; Ryckaert, Julien; Na, Myung Hee; Spessot, Alessio (2020)
    • Future Logic Scaling: Towards Atomic Channels and Deconstructed Chips 

      Samavedam, Sri; Ryckaert, Julien; Beyne, Eric; Ronse, Kurt; Horiguchi, Naoto; Tokei, Zsolt; Radu, Iuliana; Garcia Bardon, Marie; Na, Myung Hee; Spessot, Alessio; Biesemans, Serge (2020)
    • Inflection points in interconnect research and trends for 2nm and beyond in order to solve the RC bottleneck 

      Tokei, Zsolt; Vega Gonzalez, Victor; Murdoch, Gayle; O'Toole, Martin; Croes, Kristof; Baert, Rogier; van der Veen, Marleen; Adelmann, Christoph; Soulie, Jean-Philippe; Boemmels, Juergen; Wilson, Chris; Park, Seongho; Sankaran, Kiroubanand; Pourtois, Geoffrey; Swerts, Johan; Paolillo, Sara; Decoster, Stefan; Mao, Ming; Lazzarino, Frederic; Versluijs, Janko; Blanco, Victor; Ercken, Monique; Kesters, Els; Le, Quoc Toan; Holsteyns, Frank; Heylen, Nancy; Teugels, Lieve; Devriendt, Katia; Struyf, Herbert; Morin, Pierre; Jourdan, Nicolas; Van Elshocht, Sven; Ciofi, Ivan; Gupta, Anshul; Zahedmanesh, Houman; Vanstreels, Kris; Na, Myung Hee (2020)
    • Introducing 2D-FETs in Device Scaling Roadmap using DTCO 

      Ahmed, Zubair; Afzalian, Aryan; Schram, Tom; Jang, Doyoung; Verreck, Devin; Smets, Quentin; Schuddinck, Pieter; Chehab, Bilal; Sutar, Surajit; Arutchelvan, Goutham; Soussou, Assawer; Asselberghs, Inge; Spessot, Alessio; Radu, Iuliana; Parvais, Bertrand; Ryckaert, Julien; Na, Myung Hee (2020)