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Buried Power Rail Integration for CMOS Scaling beyond the 3 nm Node

dc.contributor.authorGupta, A.
dc.contributor.authorTao, Z.
dc.contributor.authorRadisic, D.
dc.contributor.authorMertens, H.
dc.contributor.authorPedreira, O. Varela
dc.contributor.authorDemuynck, S.
dc.contributor.authorBoemmels, J.
dc.contributor.authorDevriendt, K.
dc.contributor.authorHeylen, N.
dc.contributor.authorWang, S.
dc.contributor.authorKenis, K.
dc.contributor.authorTeugels, L.
dc.contributor.authorSebaai, F.
dc.contributor.authorLorant, C.
dc.contributor.authorJourdan, N.
dc.contributor.authorChan, B. T.
dc.contributor.authorSubramanian, S.
dc.contributor.authorSchleicher, F.
dc.contributor.authorPeter, A.
dc.contributor.authorRassoul, N.
dc.contributor.authorSiew, Y.
dc.contributor.authorBriggs, B.
dc.contributor.authorZhou, D.
dc.contributor.authorRosseel, E.
dc.contributor.authorCapogreco, E.
dc.contributor.authorMannaert, G.
dc.contributor.authorSepulveda, A.
dc.contributor.authorDupuy, E.
dc.contributor.authorVandersmissen, K.
dc.contributor.authorChehab, B.
dc.contributor.authorMurdoch, G.
dc.contributor.authorSanchez, E. Altamirano
dc.contributor.authorBiesemans, S.
dc.contributor.authorTokei, Zs
dc.contributor.authorLitta, E. Dentoni
dc.contributor.authorHoriguchi, N.
dc.date.accessioned2022-09-08T02:38:37Z
dc.date.available2022-09-08T02:38:37Z
dc.date.issued2022
dc.identifier.isbn978-1-5106-4987-3
dc.identifier.issn0277-786X
dc.identifier.otherWOS:000844514700010
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/40366
dc.sourceWOS
dc.titleBuried Power Rail Integration for CMOS Scaling beyond the 3 nm Node
dc.typeProceedings paper
dc.contributor.imecauthorGupta, A.
dc.contributor.imecauthorTao, Z.
dc.contributor.imecauthorRadisic, D.
dc.contributor.imecauthorMertens, H.
dc.contributor.imecauthorPedreira, O. Varela
dc.contributor.imecauthorDemuynck, S.
dc.contributor.imecauthorBoemmels, J.
dc.contributor.imecauthorDevriendt, K.
dc.contributor.imecauthorHeylen, N.
dc.contributor.imecauthorWang, S.
dc.contributor.imecauthorKenis, K.
dc.contributor.imecauthorTeugels, L.
dc.contributor.imecauthorSebaai, F.
dc.contributor.imecauthorLorant, C.
dc.contributor.imecauthorJourdan, N.
dc.contributor.imecauthorChan, B. T.
dc.contributor.imecauthorSubramanian, S.
dc.contributor.imecauthorSchleicher, F.
dc.contributor.imecauthorPeter, A.
dc.contributor.imecauthorRassoul, N.
dc.contributor.imecauthorSiew, Y.
dc.contributor.imecauthorBriggs, B.
dc.contributor.imecauthorZhou, D.
dc.contributor.imecauthorRosseel, E.
dc.contributor.imecauthorCapogreco, E.
dc.contributor.imecauthorMannaert, G.
dc.contributor.imecauthorSepulveda, A.
dc.contributor.imecauthorDupuy, E.
dc.contributor.imecauthorVandersmissen, K.
dc.contributor.imecauthorChehab, B.
dc.contributor.imecauthorMurdoch, G.
dc.contributor.imecauthorSanchez, E. Altamirano
dc.contributor.imecauthorBiesemans, S.
dc.contributor.imecauthorTokei, Zs
dc.contributor.imecauthorLitta, E. Dentoni
dc.contributor.imecauthorHoriguchi, N.
dc.identifier.doi10.1117/12.2615641
dc.identifier.eisbn978-1-5106-4988-0
dc.source.numberofpages5
dc.source.peerreviewyes
dc.source.conferenceConference on Advanced Etch Technology and Process Integration for Nanopatterning XI Part of SPIE Advanced Lithography and Patterning Conference
dc.source.conferencedateAPR 24-MAY 27, 2020-2022
dc.source.volume12056
imec.availabilityUnder review


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220.500.12860/40366.22023-04-26T08:28:26Zvalidation by library/open access desk
120.500.12860/40366*2022-09-08T02:38:37Z

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