Challenges for spacer and source/drain cavity patterning in CFET devices

Mannaert, Geert; Mertens, Hans; Hosseini, Maryam; Demuynck, Steven; Nguyen, Vy Thi Hoang; Chan, BT; Lazzarino, Frederic

doi:http://dx.doi.org/10.1117/12.2658073

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Challenges for spacer and source/drain cavity patterning in CFET devices

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2023-05-16

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https://doi.org/http://dx.doi.org/10.1117/12.2658073

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Proceedings of SPIE; Vol. 12499

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Challenges for spacer and source/drain cavity patterning in CFET devices

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