dc.contributor.author | Chuang, Po-Yao | |
dc.contributor.author | Lorenzelli, Francesco | |
dc.contributor.author | Chakravarty, Sreejit | |
dc.contributor.author | Wu, Cheng-Wen | |
dc.contributor.author | Gielen, Georges | |
dc.contributor.author | Marinissen, Erik Jan | |
dc.date.accessioned | 2023-08-09T12:33:13Z | |
dc.date.available | 2023-07-24T17:10:22Z | |
dc.date.available | 2023-07-28T12:43:25Z | |
dc.date.available | 2023-08-09T12:33:13Z | |
dc.date.issued | 2023 | |
dc.identifier.issn | 1093-0167 | |
dc.identifier.other | WOS:001011806600016 | |
dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/42188.3 | |
dc.source | WOS | |
dc.title | Effective and Efficient Testing of Large Numbers of Inter-Die Interconnects in Chiplet-Based Multi-Die Packages | |
dc.type | Proceedings paper | |
dc.contributor.imecauthor | Chuang, Po-Yao | |
dc.contributor.imecauthor | Lorenzelli, Francesco | |
dc.contributor.imecauthor | Marinissen, Erik Jan | |
dc.contributor.orcidimec | Chuang, Po-Yao::0000-0001-7325-8836 | |
dc.contributor.orcidimec | Lorenzelli, Francesco::0000-0001-6465-7157 | |
dc.contributor.orcidimec | Marinissen, Erik Jan::0000-0002-5058-8303 | |
dc.date.embargo | 9999-12-31 | |
dc.identifier.doi | 10.1109/VTS56346.2023.10140006 | |
dc.identifier.eisbn | 979-8-3503-4630-5 | |
dc.source.numberofpages | 6 | |
dc.source.peerreview | yes | |
dc.source.conference | 41st IEEE VLSI Test Symposium (VTS) | |
dc.source.conferencedate | APR 24-26, 2023 | |
dc.source.conferencelocation | San Diego | |
dc.source.journal | 2023 IEEE 41st VLSI Test Symposium (VTS) | |
imec.availability | Published - imec | |