Process Optimization of MP18 Semi-Damascene Interconnects with Fully Self-Aligned Vias at Sub-2nm Nodes

Abstract

This work presents a process optimization study of 18nm metal pitch (MP) semi-damascene interconnects with fully self-aligned Vias (FSAV) using SEMulator3D (R) virtual fabrication coupled with silicon data. Simulation was used to early identify process failures and avoid via opens found on silicon, and to ensure process manufacturability. A full predictive virtual model was calibrated against silicon data to predict the complete process flow from the M2 module to the via module. A process sensitivity analysis was performed to simulate process variability impact on via resistance performance. The simulation identified process parameters and corresponding process windows that need to be controlled to avoid via opens and ensure process manufacturability.