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Investigations and physical modelling of saturation effects in lateral DMOS transistor architectures based on the concept of intrinsic drain voltage
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Authors
Anghel, C.
;
Hefyene, N.
;
Ionescu, A. M.
;
Vermandel, Miguel
;
Bakeroot, Benoit
;
Doutrloigne, J.
;
Gillon, R.
;
Frere, S.
;
Maier., C.
;
Mourier, Y.
Conference
Proceedings of the 31st European Solid-State Device Research Conference
Title
Investigations and physical modelling of saturation effects in lateral DMOS transistor architectures based on the concept of intrinsic drain voltage
Publication type
Proceedings paper
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