Browsing Presentations by imec author "2582ae04d02ff2073004169f4a934d0cbcf31120"
Now showing items 1-20 of 21
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3D-COSTAR: A cost model for 3D stacked ICs
Taouil, Mottaqiallah; Hamdioui, Said; Marinissen, Erik Jan; Bhawmik, Sudipta (2013) -
3D-SIC test challenges and solutions
Marinissen, Erik Jan (2013) -
A standardizable 3D DfT architecture
Marinissen, Erik Jan; Chi, Chun-Chuan; Verbree, Jouke; Konijnenburg, Mario (2010) -
Automated DfT insertion and test generation for 3D-SICs with embedded cores and multiple towers
Papameletis, Christos; Keller, Brion; Chickermane, Vivek; Marinissen, Erik Jan; Hamdioui, Said (2013) -
Automation of 3D DfT insertion and interconnect test generation
Deutsch, Sergej; Chickermane, Vivek; Keller, Brion; Konijnenburg, Mario; Marinissen, Erik Jan; Goel, Sandeep K. (2011) -
Challenges and emerging solutions in testing 2.5D- and 3D-stacked ICs
Marinissen, Erik Jan (2012) -
Challenges and emerging solutions in testing 2.5D- and 3D-stacked ICs
Marinissen, Erik Jan (2013) -
Cost-effectiveness of wafer-to-wafer 3D chip stacking with matching pre-tested wafers
Verbree, Jouke; Marinissen, Erik Jan; Roussel, Philippe; Velenis, Dimitrios (2010) -
Creating options for 3D-SIC testing
Marinissen, Erik Jan (2013) -
Design, test generation, processing, and pre- and post-bond measurement results of a 3D-DfT demonstrator chip stack
Marinissen, Erik Jan; De Wachter, Bart; O'Loughlin, Stephen; Deutsch, Sergej; Papameletis, Christos; Burgherr, Tobias (2014) -
DfT architecture for multi-tower 3D-SICs
Chi, Chun-Chuan; Marinissen, Erik Jan; Goel, Sandeep Kumar; Wu, Cheng-Wen (2011) -
Die-wrapper optimization for 3D stacked ICs
Noia, Brandon; Chakrabarty, Krishnendu; Marinissen, Erik Jan (2010) -
From 2D boards to 3D chips: test and DfT challenges and solutions
Marinissen, Erik Jan (2013) -
Impact of design choices on 3D SiC manufacturing cost
Velenis, Dimitrios; Stucchi, Michele; Marinissen, Erik Jan; Beyne, Eric (2009) -
Implementation aspects of a 3D DfT architecture
Deutsch, Sergej; Chickermane, Vivek; Keller, Brion; Mukherjee, Subhasish; Konijnenburg, Mario; Marinissen, Erik Jan (2011) -
New distinguished contributor recognition program webinar
Douglis, Fred; Marinissen, Erik Jan (2020) -
Probing fine-pitch wafers & testing advanced packages
Marinissen, Erik Jan (2018) -
Status report of IEEE P1838 - Standard for test access architecture for three-dimensional stacked integrated circuits
Marinissen, Erik Jan; Cron, Adam (2011) -
Testing & diagnosis of fine-pitch wafers and advanced packages
Fodor, Ferenc; Marinissen, Erik Jan; Acconcia, Daniele; Bertarelli, Emanuele; Vallauri, Raffaele (2018) -
Very small pitch micro bump array probing
Boehm, Gunther; Kalt, Samuel; Kiesewetter, Joerg; Klumpp, Armin; Marinissen, Erik Jan; Schaefer, Wolfgang (2013)