Toggle navigation
My submissions
Login
Toggle navigation
View item
imec Publications Repository
imec Publications
Articles
View item
imec Publications Repository
imec Publications
Articles
View item
JavaScript is disabled for your browser. Some features of this site may not work without it.
Gate-source-drain architecture impact on DC and performance of sub-100-nm elevated source/drain NMOS transistors
Metadata
Show full item record
Authors
Jeamsaksiri, Wutthinan
;
Jurczak, Gosia
;
Grau, Lluis
;
Linten, Dimitri
;
Augendre, Emmanuel
;
de Potter de ten Broeck, Muriel
;
Rooyackers, Rita
;
Wambacq, Piet
;
Badenes, Gonçal
Issue
3
Journal
IEEE Trans. Electron Devices
Volume
50
Title
Gate-source-drain architecture impact on DC and performance of sub-100-nm elevated source/drain NMOS transistors
Publication type
Journal article
Collections
Articles
Search imec Publications Repository
This collection
Browse
All of imec Publications Repository
Collections
Publication date
Authors
Titles
Subjects
imec author
Availability
Publication type
This collection
Publication date
Authors
Titles
Subjects
imec author
Availability
Publication type
My account
login