Toggle navigation
My submissions
Login
Toggle navigation
View item
imec Publications Repository
imec Publications
Articles
View item
imec Publications Repository
imec Publications
Articles
View item
JavaScript is disabled for your browser. Some features of this site may not work without it.
A hybrid design-time/run-time scheduling flow to minimise the reconfiguration overhead of FPGAs
Metadata
Show full item record
Authors
Resano Ezcaray, Jesús Javier
;
Verkest, Diederik
;
Mozos, Daniel
;
Vernalde, Serge
;
Catthoor, Francky
Issue
5_6
Journal
Microprocessors and microsystems
Volume
28
Title
A hybrid design-time/run-time scheduling flow to minimise the reconfiguration overhead of FPGAs
Publication type
Journal article
Collections
Articles
Search imec Publications Repository
This collection
Browse
All of imec Publications Repository
Collections
Publication date
Authors
Titles
Subjects
imec author
Availability
Publication type
This collection
Publication date
Authors
Titles
Subjects
imec author
Availability
Publication type
My account
login