Browsing by Author "Agarwal Kumar, Tarun"

2D materials: roadmap to CMOS integration

Benchmarking of monolithic 3D integrated MX2 FETs with Si FinFETs

Benchmarking of MoS2 FETs with multigate Si-FET options for 5 nm and beyond

Bilayer graphene tunneling-FET for sub-0.2 V digital CMOS logic applications

Chemically enhanced double-gate bilayer graphene field-effect transistor with neutral channel for logic applications

Comparison of short-channel effects in monolayer MoS2 based junctionless and inversion-mode field-effect transistors

Device-Circuit Co-Design of 2D Material Based Devices for Future Electronics

Effect of material parameters on two-dimensional materials based TFETs: an energy-delay perspective

Heterostructure at CMOS source/drain: contributor or alleviator to the high access resistance problem?

Material selection and device design guidelines for two-dimensional materials based TFETs

Material-device-circuit co-optimization of 2D material based FETs for ultra-scaled technology nodes

Polarity-controllable 2-dimensional transistors: experimental demonstration and scaling opportunities

Scaling trends and performance evaluation of 2-dimensional polarity-controllable FETs

Towards high-performance polarity-controllable FETs with 2D materials

Tunneling transistors based on MoS2/MoTe2 van der Waals heterostructures

Tunneling transistors based on MoS2/MoTe2 Van der Waals heterostructures