Browsing by Author "Daily, Robert"
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Publication 3D IC process development for enabling chip-on-chip and chip on wafer multi-stacking at assembly
Meeting abstract2015, International Conference on Electronic Packaging & iMAPS All Asia Conference - ICEP-IACC, 14/04/2015, p.56-60Publication 3D stacking induced mechanical stress effects
Proceedings paper2014, IEEE 64th Electronic Components and Technology Conference - ECTC, 27/05/2014, p.309-315Publication Cobalt UBM for fine pitch microbump applications in 3DIC
Proceedings paper2015, IEEE International Interconnect Technology Conference - IITC / Materials for Advanced Metallization Conference - MAM, 18/05/2015, p.221-224Publication Comparative study of 3D stacked IC and 3D interposer integration: processing and assembly challenges
Proceedings paper2014, IEEE 3D Sytem Integration Conference - 3DIC, 1/12/2014, p.1-7Publication Cu-Cu insertion bonding technique using photosensitive polymer as WLUF
Proceedings paper2014, 16th IEEE Electronic Packaging Technology Conference - EPTC, 3/12/2014, p.313-317Publication Developing underfill process in screening of no-flow underfill and wafer-applied underfill materials for 3D stacking
; ; ;Daily, Robert; ; Wang, TengProceedings paper2013, 15th Electronics Packaging Technology Conference - EPTC, 11/12/2013, p.124-129Publication Development and evaluation of photodefinable wafer level underfill
;Mitsukura, Kazuyuki ;Saisyo, Ryouta ;Makino, TatsuyaHatakeyama, KeiichiJournal article2015, Journal of Photopolymer Science and Technology, (28) 2, p.229-232Publication Development of underfilling and thermo-compression bonding processes for stacking multi-layer 3D ICs
Proceedings paper2014, 5th Electronics System-Integration Technology Conference - ESTC, 16/09/2014, p.1-5Publication Effects of packaging on mechanical stress in 3D-ICs
Proceedings paper2015, IEEE 65th Electronic Components & Technology Conference - ECTC, 26/05/2015, p.354-361Publication Experimental thermal characterization and thermal model validation of 3D packages using a programmable thermal test chip
Proceedings paper2015-05, IEEE Electronic Components & Technology Conference - ECTC, 26/05/2015, p.1134-1141Publication Exploring process interaction of no-flow underfill and thermo-compression bonding in D2D stacking
Meeting abstract2013, International Wafer-Level Packaging Conference - IWLPC, 5/11/2013Publication Fabrication of silicon based microfluidics device for cell sorting applications
Proceedings paper2014, IEEE 64th Electronic Components and Technology Conference - ECTC, 27/05/2014, p.165-169Publication Integration of capillary self-alignment for Face to Face micro bump bonding
Proceedings paper2013-09, European Microelectronics Packaging Conference - EMPC, 9/09/2013Publication Interposer technology for high band width interconnect applications
; ; ; ; ;Daily, RobertProceedings paper2013, 63rd Electronic Components And Technology Conference - ECTC, 28/05/2013, p.323-328Publication NiB Capping of Cu landing pads for thermocompression bonding
;England, Luke; ; ; ;Daily, RobertMeeting abstract2014, 23rd Materials for Advanced Metallization Conference, 2/03/2014Publication Process development to enable 3D IC multi-tier die bond for 20 $lm pitch and beyond
Proceedings paper2014, IEEE 64th Electronic Components and Technology Conference - ECTC, 27/05/2014, p.572-575Publication Process development to enable die sorting and 3D IC stacking
Proceedings paper2012-12, 14th Electronics Packaging Technology Conference - EPTC, 5/12/2012Publication Reliability of 3D package using wafer level underfill and low CTE epoxy mold compound materials
Proceedings paper2014, 16th IEEE Electronic Packaging Technology Conference - EPTC, 3/12/2014, p.444-448Publication Stacking aspects in the view of scaling
Proceedings paper2012, IMAPS 45th International Symposium on Microelectronics, 9/09/2012, p.735-740Publication Underfill material screening and process characterization for 3D stacking
Proceedings paper2012, 4th Electronics System Integration Technologies Conference - ESTC, 17/09/2012