Browsing by Author "Duffy, R."
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Publication CMOS scaling beyond the 90 nm CMOS technology node: shallow junction and integration challenges
Proceedings paper2003, Ultra Shallow Junctions. 7th Int. Worksh. Fabrication, Characterization and Modeling of Ultra Shallow Doping Profiles in Semic., 27/04/2003, p.15-22Publication Conformal doping for FINFET's: a fabrication and metrology challenge
Oral presentation2008, Stanford & Tohoku University Joint Open Workshop on 3D Transistor and its ApplicationsPublication Junction architecture for planar devices
Proceedings paper2007, Advanced Gate Stack, Source/Drain and Channel Engineering for Si-Based CMOS 3: New Materials, Processes and Equipment, 6/05/2007, p.351-364Publication Quantitative prediction of junction leakage in bulk-technology CMOS devices
;Duffy, R. ;Heringa, A. ;Venezia, V.C. ;Loo, Josine ;Verheijen, M.A.Hopstaken, M.J.P.Journal article2010, Solid-State Electronics, (54) 3, p.243-251