Browsing by Author "Gaudin, Gweltaz"
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Publication 3D sequential stacked planar devices featuring low-temperature replacement metal gate junctionless top devices with improved reliability
; ; ; ; ; Journal article2018-11, IEEE Transactions on Electron Devices, (65) 11, p.5165-5171Publication 3D sequential stacked planar devices on 300 mm wafers featuring replacement metal gate junction-less top devices processed at 525°C with improved reliability
; ; ; ; ; Proceedings paper2018, IEEE Symposium on VLSI Technology, 18/06/2018, p.69-70Publication Low temperature junctionless device stacking enabled by leading edge
Meeting abstract2019-04, 2019 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA), 22/04/2019, p.1-2Publication Towards the integration of In53Ga47As on 300 mm Si for CMOS sub 7 nm node: development of thin graded InGaAs buffers
Meeting abstract2015, 20th American Conf on Crystal Growth and Epitaxy - ACCGE-20 and 17th Biennial Ws on Organometallic Vapor Phase Epitaxy- OMVPE-17, 2/08/2015