Browsing by Author "Godfrin, Clement"
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Publication A flexible 300 mm integrated Si MOS platform for electron- and hole-spin qubits exploration
Proceedings paper2020, IEEE International Electron Devices Meeting (IEDM), DEC 12-18, 2020Publication A Scalable One Dimensional Silicon Qubit Array with Nanomagnets
Proceedings paper2020, IEEE International Electron Devices Meeting (IEDM), DEC 12-18, 2020Publication Compressively strained epitaxial Ge layers for quantum computing applications
Journal article2024, MATERIALS SCIENCE IN SEMICONDUCTOR PROCESSING, 174, p.Art. 108231Publication Demonstration of 99.9% single qubit control fidelity of a silicon quantum dot spin qubit made in a 300 mm foundry process
;Dumoulin Stuyck, N. ;Feng, M. K. ;Lim, W. H. ;Serrano Ramirez, S. ;Escott, C. C. ;Botzem, T.Tanttu, T.Proceedings paper2024, IEEE Silicon Nanoelectronics Workshop (SNW) / Symposium on VLSI Technology and Circuits, 2024-06-15, p.11-12Publication Experimental Online Quantum Dots Charge Autotuning Using Neural Networks
;Yon, Victor ;Galaup, Bastien ;Rohrbacher, Claude ;Rivard, JoffreyMorel, AlexisJournal article2025-FEB 27, NANO LETTERSPublication Industrial 300 mm wafer processed spin qubits in natural silicon/silicon-germanium
;Koch, Thomas ;Godfrin, Clement ;Adam, Viktor ;Ferrero, Julian ;Schroller, DanielGlaeser, NoahJournal article2025-APR 5, NPJ QUANTUM INFORMATION, (11) 1Publication Large-Scale 2D Spin-Based Quantum Processor with a Bi-Linear Architecture
Proceedings paper2021, IEEE International Electron Devices Meeting (IEDM), DEC 11-16, 2021Publication Linking Room- and Low-Temperature Electrical Performance of MOS Gate Stacks for Cryogenic Applications
;Kao, K-H; ; ; ; ; Journal article2022, IEEE ELECTRON DEVICE LETTERS, (43) 5, p.674-677Publication Low charge noise quantum dots with industrial CMOS manufacturing
; ;Shehata, M. M. K.; ; ; Journal article2024-JUL 19, NPJ QUANTUM INFORMATION, (10) 1, p.70Publication Robust quantum dots charge autotuning using neural network uncertainty
Journal article2024, MACHINE LEARNING-SCIENCE AND TECHNOLOGY, (5) 4, p.Art. 045034Publication Statistical analysis of spurious dot formation in silicon metal-oxide-semiconductor single electron transistors
Journal article2025-MAR 5, PHYSICAL REVIEW B, (111) 12Publication Study of Transistor Metrics for Room-Temperature Screening of Single Electron Transistors for Silicon Spin Qubit Applications
Proceedings paper2023, 28th IEEE European Test Symposium (ETS), MAY 22-26, 2023Publication TCAD-Assisted MultiPhysics Modeling & Simulation for Accelerating Silicon Quantum Dot Qubit Design
Proceedings paper2020, International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), SEP 23-OCT 06, 2020, p.253-256Publication Toward Wafer-Scale Screening of Spin Qubits: A Room-Temperature-Aware Single-Electron Transistor Design
Journal article2025-JUN 17, IEEE TRANSACTIONS ON ELECTRON DEVICES, (72) 8, p.4506-4514Publication Understanding the Transistor Behavior of Electron-Spin Qubits Above Cryogenic Temperatures
Letter2024, 45, p.2217-2220Publication Wafer-Scale Electrical Characterization of Silicon Quantum Dots from Room to Low Temperatures
Proceedings paper2023-12-22, 2023 IEEE International Test Conference (ITC), 07-15 October 2023