Browsing by Author "Grau, Lluis"
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Publication Elevated co-silicide for sub-100nm high performance and RF CMOS
Proceedings paper2002, ESSDERC - 32nd European Solid-State Device Research Conference, 24/09/2002, p.311-314Publication Gate-source-drain architecture impact on DC and performance of sub-100-nm elevated source/drain NMOS transistors
Journal article2003, IEEE Trans. Electron Devices, (50) 3, p.610-617Publication Optimisation of active area edge protection in shallow trench isolation
Proceedings paper2001, ULSI Process Integration II; 26 March 2001; Washington, D.C., USA., p.539-546Publication Processing factors influencing the leakage current in shallow junction diodes for deep submicro-meter CMOS
Journal article2001, Journal of Materials Science: Materials in Electronics, (12) 4_6, p.211-14Publication Processing factors influencing the leakage current in shallow junction diodes for deep submicron CMOS
Proceedings paper2000, 3rd International Conference Materials for Microelectronics, 16/10/2000, p.11-14Publication The RF potential of high-performance 100nm CMOS technology