Browsing by Author "Jiang, Xiaoqiang"
Now showing 1 - 5 of 5
- Results Per Page
- Sort Options
Publication A new quality metric for III-V/high-k MOS gate stacks based on the frequency dispersion of accumulation capacitance and the CET
Journal article2017, IEEE Electron Device Letters, (38) 3, p.318-321Publication Atomic layer deposition of novel interface layers on III-V channel devices
Proceedings paper2017, AVS 17th International Conference on Atomic Layer Deposition - ALD, 15/07/2017, p.AA2-TuA8Publication BTI Reliability of InGaAs nMOS gate-stack: on the impact of shallow and deep defect bands on the operating voltage range of III-V technology
; ; ; ;Sioncke, Sonja; ; Proceedings paper2017, IEEE International Reliability Physics Symposium - IRPS, 2/04/2017, p.XT-8.1-XT-8.6Publication Novel gate stack engineering for high mobility Ge nFETs
Meeting abstract2018, MRS Spring Meeting, 3/04/2018Publication Si-passivated Ge nMOS gate stack with low DIT and dipole-induced superior PBTI reliability using 3D-compatible ALD caps and high-pressure anneal
; ; ; ; ; ;Tang, FuJiang, XiaoqiangProceedings paper2016, IEEE International Electron Devices Meeting - IEDM, 3/12/2016, p.834-837