Browsing by Author "Karner, M."
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Publication A TCAD Compatible SONOS Trapping Layer Model for Accurate Programming Dynamics
Publication Modeling the Operation of Charge Trap Flash Memory–Part I: The Importance of Carrier Energy Relaxation
Journal article2024, IEEE TRANSACTIONS ON ELECTRON DEVICES, (71) 1, p.547-553Publication Monolithic TCAD simulation of phase-change memory (PCM/PRAM) plus Ovonic Threshold Switch (OTS) selector device
Publication Physical modeling of NBTI: from individual defects to devices
Proceedings paper2014, International Conference on Simulation of Semiconductor Processes and Devices - SISPAD, 9/09/2014, p.81-84Publication Reliability and Variability-Aware DTCO Flow: Demonstration of Projections to N3 FinFET and Nanosheet Technologies
Publication Simulation of rReliability of nanoscale devices
Proceedings paper2012, International Conference on Simulation of Semiconductor Processes and Devices - SISPAD, 5/09/2012Publication Understanding the ISPP Slope in Charge Trap Flash Memory and its Impact on 3-D NAND Scaling
Proceedings paper2021, IEEE International Electron Devices Meeting (IEDM), DEC 11-16, 2021