Browsing by Author "Li, Y."
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Publication 12-EUV layer Surrounding Gate Transistor (SGT) for vertical 6-T SRAM: 5-nm-class technology for ultra-density logic devices
; ; ; ; Huynh Bao, TrongProceedings paper2019, 2019 Symposium on VLSI Technology, 9/06/2019, p.T15-1Publication Advances in Magnetics Roadmap on Spin-Wave Computing
Journal article2022, IEEE TRANSACTIONS ON MAGNETICS, (58) 6, p.0800172Publication An investigation of field reduction effect on NBTI parameter characterization and lifetime prediction using a constant field stress method
; Publication CMP process development for high mobility channel materials
Proceedings paper2012, International Conference on Planarization/CMP Technology - ICPT, 15/10/2012Publication Insights into the effect of TiN thickness scaling on DC and AC NBTI characteristics in replacement metal gate pMOSFETs
; Publication Interconnects for scaled SRAM with vertical Surrounded Gate Transistors (SGT)
Proceedings paper2019, IEEE International Interconnect Technology Conference (IITC 2019) and Materials for Advanced Metallization Conference (MAM 2019), 3/06/2019, p.2.5Publication LPCVD polysilicon-based passivating contacts for plated bifacial n-type PERT solar cells
Meeting abstract2018, 35th European Photovoltaic Photovoltaic Solar Energy Conference and Exhibition - EU PVSEC, 24/09/2018, p.2CO.10.4Publication Reflectionless grating coupling for silicon-on-insulator integrated circuits
Proceedings paper2011, 8th International Conference in Group IV Photonics, 14/09/2011, p.74-75Publication Understanding frequency dependence of trap generation under AC negative bias temperature instability stress in Si p-FinFETs
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