Browsing by Author "Marchal, Pol"
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Publication 3-D technology assessment: path-finding the technology/design sweet-spot
Journal article2009, Proceedings of the IEEE, (97) 1, p.96-107Publication 3D heterogeneous system integration: Application driver for 3D technology development
Proceedings paper2011, 48th ACM/EDAC/IEEE Design Automation Conference - DAC, 5/06/2011, p.213Publication 3D integration or how to scale in the 21st century
Marchal, PolOral presentation2008, Design, Automation and Test in Europe Conference - DATEPublication 3D integration technology basics and its impact on design
; Marchal, PolOral presentation2010, Workshop on Technology-Architecture Interaction at the 37th International Symposium on Computer Architecture (ISCA-37)Publication 3D Integration: Circuit design, test and reliability challenges
Proceedings paper2010, 16th IEEE International On-Line Testing Symposium - IOLTS, 5/07/2010, p.217Publication 3D IO interface design between memory and logic dies on TSV interconnects
Proceedings paper2009, HPCA-15 / Workshop on 3D Integration and Interconnection-Centric Architectures, 14/02/2009Publication 3D technology roadmap and status
Proceedings paper2011, IEEE International Interconnect Technology Conference and Materials for Advanced Metallization - IITC/MAM, 8/05/2011Publication 3D-Integration: status, opportunities
; Marchal, PolOral presentation2011, 16th Asia and South Pacific Design Automation Conference - ASP-DACPublication A calibrated pathfinding model for signal integrity analysis on interposer
Proceedings paper2012, IEEE Custom Integrated Circuits Conference - CICC, 9/09/2012Publication A designer's perspective on future memory architectures for software defined radios
Publication A practical approach to thermal modeling and validation of 3D-ICs
Meeting abstract2010, DAC 2010 User Track, 13/07/2010Publication A study of trade-offs in inter-frame compression MPEG4 for a multiprocessor platform
Proceedings paper2004, Design of Circuits and Integrated Systems (DCIS) Conference, 1/11/2004, p.363-368Publication An integrated hardware/software approach for run-time scratchpad management
Proceedings paper2004, Proceedings of the 41st Annual Conference on Design Automation, 7/06/2004, p.238-243Publication An RDL-configurable 3D memory tier to replace on-chip SRAM
Proceedings paper2010, Design, Automation and Test in Europe Conference - DATE, 8/03/2010, p.291-294Publication Analysis of microbump induced stress effects in 3D stacked IC technologies
; ; Proceedings paper2012, IEEE International 3D System Integration Conference - 3DIC, 31/01/2012, p.9-AprPublication Application of substrate noise simulation methodology to 3D-stacking
Oral presentation2009, Design, Automation and Test in Europe Conference - DATE: Workshop on 3D Integration (W5)Publication Architectures and circuits for software defined radios: scaling and scalability for low cost and low energy
Proceedings paper2007-02, IEEE International Solid-State Circuits Conference - ISSCC, 11/02/2007, p.568-569Publication At tape-out: can yield in terms of parametric specifications be predicted?
Publication Automated PathFinding tool chain for 3D-stacked integrated circuits: practical case study
Proceedings paper2009-09, IEEE 3D System Integration Conference - 3DSIC, 28/09/2009