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Browsing by Author "Ravit, Claire"

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    Controlling STI-related parasitic conduction in 90nm CMOS and below

    Augendre, Emmanuel
    ;
    Rooyackers, Rita
    ;
    Shamiryan, Denis
    ;
    Ravit, Claire
    ;
    Jurczak, Gosia  
    Proceedings paper
    2002, ESSDERC - 32nd European Solid-State Device Research Conference, 24/09/2002, p.507-510
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    Demonstration of recessed SiGe S/D and inserted metal gate on HfO2 for high performance pFETs

    Verheyen, Peter  
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    Eneman, Geert  
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    Rooyackers, Rita
    ;
    Loo, Roger  
    ;
    Eeckhout, Lieve
    ;
    Rondas, Dirk  
    Proceedings paper
    2005-12, Technical Digest International Electron Devices Meeting (IEDM), 5/12/2005, p.907-910
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    Ge-migration in s-Si-SiGe structures during implantation and annealing

    Vandervorst, Wilfried  
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    Janssens, Tom
    ;
    Geenen, Luc
    ;
    Loo, Roger  
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    Caymax, Matty  
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    Delhougne, Romain  
    Oral presentation
    2005, 8th International Workshop on the Fabrication, Characterization and Modeling of Ultra-Shallow Junctions in Semiconductors
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    In-depth characterization of the hole mobility in 50-nm process-induced strained MOSFETs

    Andrieu, F.
    ;
    Ernst, T.
    ;
    Ravit, Claire
    ;
    Jurczak, Gosia  
    ;
    Gibaudo, G.
    ;
    Deleonibus, S.
    Journal article
    2005, IEEE Electron Device Letters, (26) 10, p.755-757

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