Browsing by Author "Sood, Navdeep"
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Publication DfT architecture and ATPG for interconnect tests of JEDEC wide-IO DRAM memory-on-Logic 2.5D/3D-stacks
;Deutsch, Sergej ;Chickermane, Vivek ;Keller, Brion ;Mukherjee, SubhasishSood, NavdeepProceedings paper2012-05, Cadence CDNLive! EMEA, 14/05/2012Publication DfT architecture and ATPG for interconnect tests of JEDEC wide-IO memory-on-logic die stacks
;Deutsch, Sergej ;Keller, Brion ;Chickermane, Vivek ;Mukherjee, SubhasishSood, NavdeepProceedings paper2012-11, IEEE International Test Conference - ITC, 6/11/2012, p.1-10Publication Interconnect test for wide-IO memory-on-logic stacks
Journal article2012-07, Future Fab International, 42, p.112-117