Browsing by Author "Stanojevic, Z."
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Publication A TCAD Compatible SONOS Trapping Layer Model for Accurate Programming Dynamics
;Schanovsky, F. ;Rzepa, G. ;Stanojevic, Z. ;Kernstock, C. ;Baumgartner, O.Karner, M.Proceedings paper2021, IEEE International Memory Workshop (IMW), MAY 16-19, 2021, p.64-67Publication Modeling the Operation of Charge Trap Flash Memory–Part I: The Importance of Carrier Energy Relaxation
Journal article2024, IEEE TRANSACTIONS ON ELECTRON DEVICES, (71) 1, p.547-553Publication Monolithic TCAD simulation of phase-change memory (PCM/PRAM) plus Ovonic Threshold Switch (OTS) selector device
;Thesberg, M. ;Stanojevic, Z. ;Baumgartner, O. ;Kernstock, C. ;Leonelli, D. ;Barci, M.Wang, X.Journal article2023, SOLID-STATE ELECTRONICS, (199) January, p.Art.: 108504Publication Reliability and Variability-Aware DTCO Flow: Demonstration of Projections to N3 FinFET and Nanosheet Technologies
;Rzepa, G. ;Karner, M. ;Baumgartner, O. ;Strof, G. ;Schanovsky, F. ;Mitterbauer, F.Kernstock, C.Proceedings paper2021, IEEE International Reliability Physics Symposium (IRPS), MAR 21-24, 2021Publication Understanding the ISPP Slope in Charge Trap Flash Memory and its Impact on 3-D NAND Scaling
Proceedings paper2021, IEEE International Electron Devices Meeting (IEDM), DEC 11-16, 2021