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Browsing by Author "Tang, F."

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    Demonstration of an InGaAs gate stack with sufficient PBTI reliability by thermal budget optimization, nitridation, high-k material choice, and interface dipole

    Franco, Jacopo  
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    Vais, Abhitosh  
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    Sioncke, Sonja
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    Putcha, Vamsi  
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    Kaczer, Ben  
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    Shie, Bo-Shiuan
    Proceedings paper
    2016, IEEE Symposium on VLSI Technology, 13/06/2016, p.42-43
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    Gate-all-around InGaAs nanowire FETs with peak transconductance of 2200 μS/μm at 50nm Lg using a replacement fin RMG flow

    Waldron, Niamh  
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    Sioncke, Sonja
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    Franco, Jacopo  
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    Nyns, Laura  
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    Vais, Abhitosh  
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    Zhou, Daisy  
    Proceedings paper
    2015, IEEE International Electron Devices Meeting - IEDM, 7/12/2015, p.799-802
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    Record mobility (μeff ~3100 cm²/V-s) and reliability performance (Vov~0.5V for 10yr operation) of In0.53Ga0.47As MOS devices using improved surface preparation and a novel interfacial layer

    Vais, Abhitosh  
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    Alian, AliReza  
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    Nyns, Laura  
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    Franco, Jacopo  
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    Sioncke, Sonja
    ;
    Putcha, Vamsi  
    ;
    Yu, Hao  
    Proceedings paper
    2016, IEEE Symposium on VLSI Technology, 13/06/2016, p.140-141

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