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Browsing by Author "Vassilev, Vesselin"

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    A 1.3dB NF CMOS LNA for GPS with 3kV HBM ESD-protection

    Leroux, P.
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    Steyaert, M.
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    Vassilev, Vesselin
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    Groeseneken, Guido  
    Proceedings paper
    2002-09, Proceedings European Solid-State Circuit Conference - ESSCIRC, 23/09/2002, p.335-338
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    A 1.6dB NF CMOS LNA for GPS with 3kV HBM ESD-protection

    Leroux, P.
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    Steyaert, M.
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    Vassilev, Vesselin
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    Groeseneken, Guido  
    Proceedings paper
    2002, Proceedings 24th EOS/ESD Symposium, 6/10/2002, p.18-25
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    A CAD assisted design and optimisation methodology for over-voltage ESD protection circuits

    Vassilev, Vesselin
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    Vaschenko, Vladislav
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    Jansen, Philippe
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    Choi, B.-J.
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    Concannon, An
    Journal article
    2004, Microelectronics Reliability, (44) 9_11, p.1885-1890
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    A compact MOSFET breakdown model for optimization of gate coupled ESD protection circuits

    Vassilev, Vesselin
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    Groeseneken, Guido  
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    Bock, Karlheinz
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    Maes, Herman
    Proceedings paper
    1999, ESSDERC'99 - Proceedings of the 29th European Solid-State Device Research Conference; 13-15 September 1999; Leuven, Belgium., p.600-603
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    Advanced modeling and parameter extraction of the MOSFET ESD breakdown triggering in the 90nm CMOS node technologies

    Vassilev, Vesselin
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    Lorenzini, Martino
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    Jansen, Philippe
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    Groeseneken, Guido  
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    Thijs, Steven  
    Proceedings paper
    2004, Electrical Overstress / Electrostatic Discharge Symposium Proceedings, 19/09/2004, p.2.B.1
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    Analysis and improved compact modelling of the breakdown behaviour of sub-0.25 micron ESD protection ggNMOS devices

    Vassilev, Vesselin
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    Lorenzini, Martino
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    Groeseneken, Guido  
    ;
    Steyaert, Michel
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    Maes, Herman
    Proceedings paper
    2001, Electrical Overstress/Electrostratic Discharge Syymposium Proceedings - EOS/ESD, 11/09/2001, p.461-468
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    CAD assisted ESD protection optimization for advanced digital and RF CMOS applications

    Vassilev, Vesselin
    PHD thesis
    2004-09
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    Co-design methodology to provide high esd protection levels in the advanced rf circuits

    Vassilev, Vesselin
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    Thijs, Steven  
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    Lajo-Segura, P.
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    Groeseneken, Guido  
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    Wambacq, Piet  
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    Leroux, P.
    Proceedings paper
    2003-09, Proceedings EOS/ESD Symposium, 21/09/2003, p.195-203
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    Design-driven optimisation of a 90 nm RF CMOS process by use of elevated source/drain

    Linten, Dimitri  
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    Thijs, Steven  
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    Jeamsaksiri, Wutthinan
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    Mahadeva Iyer, Natarajan
    Proceedings paper
    2003-09, 33rd European Solid-State Devices Research Conference - ESSDERC, 16/09/2003, p.43-46
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    Dynamic substrate resistance snapback of ESD protection devices

    Vassilev, Vesselin
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    Groeseneken, Guido  
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    Steyaert, M.
    ;
    Maes, Herman
    Proceedings paper
    2003, Proceedings 41st Annual IEEE International Reliability Physics Symposium, 30/03/2003, p.256-260
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    Enhanced ESD protection robustness of a lateral NPN structure in the advanced CMOS

    Vassilev, Vesselin
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    Groeseneken, Guido  
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    Steyaert, Michiel
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    Maes, Herman
    Proceedings paper
    2004, Proceedings IEEE International Reliability Physics Symposium - IRPS, 25/04/2004, p.605-606
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    ESD circuit model based protection network optimisation for extended-voltage NMOS drivers

    Vassilev, Vesselin
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    Vaschenko, V.
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    Jansen, Philippe
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    Groeseneken, Guido  
    ;
    Terbeek, M.
    Journal article
    2005-10, Micrelectronics Reliability, (45) 9_11, p.1430-1435
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    ESD protection challenges in RFCMOS circuits - an overview

    Mahadeva Iyer, Natarajan
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    Vassilev, Vesselin
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    Thijs, Steven  
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    Groeseneken, Guido  
    Oral presentation
    2004, IEEE International Symposium on Microwaves - ISM
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    ESD protection for a 5.5 GHz LNA in 90 nm RF CMOS implementation concepts, constraints and solutions

    Thijs, Steven  
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    Mahadeva Iyer, Natarajan
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    Linten, Dimitri  
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    Vassilev, Vesselin
    ;
    Daenen, Tom  
    Proceedings paper
    2005-11, RCJ Symposium, 10/11/2005, p.97-106
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    ESD protection for a 5.5 GHz LNA in 90 nm RF CMOS implementation concepts, constraints and solutions

    Thijs, Steven  
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    Mahadeva Iyer, Natarajan
    ;
    Linten, Dimitri  
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    Vassilev, Vesselin
    ;
    Daenen, Tom  
    Proceedings paper
    2004, Electrical Overstress / Electrostatic Discharge Symposium Proceedings, 19/09/2004, p.1.B.2
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    ESD reliability issues in RF CMOS circuits

    Radhakrishnan, M. K.
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    Vassilev, Vesselin
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    Keppens, Bart
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    De Heyn, Vincent  
    Proceedings paper
    2002, Proceedings of the International Workshop on Semiconductor devices, 11/12/2001, p.551-556
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    ESD reliability issues in sub-micron CMOS - trends and challenges

    Mahadeva Iyer, Natarajan
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    Vassilev, Vesselin
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    Thijs, Steven  
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    De Heyn, Vincent  
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    Daenen, Tom  
    Oral presentation
    2003, 2nd MRS Int. Conf. on Materials for Advanced Technologies & IUMRS
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    ESD-RF co-design methodology for the state of the art RF-CMOS blocks

    Vassilev, Vesselin
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    Thijs, Steven  
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    Segura, Pablo
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    Wambacq, Piet  
    ;
    Leroux, Paul
    Journal article
    2005, Microelectronics and Reliability, (45) 2, p.255-268
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    High ESD performance, low power CMOS LNS for GPS applications

    Leroux, P.
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    Vassilev, Vesselin
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    Steyaert, M.
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    Maes, Herman
    Journal article
    2003, Journal of Electrostatics, (59) 3_4, p.179-192
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    High frequency characterization and modelling of the parasitic RC performance of two terminal ESD CMOS protection devices

    Vassilev, Vesselin
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    Jenei, Snezana
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    Groeseneken, Guido  
    ;
    Venegas, Rafael
    ;
    Thijs, Steven  
    Journal article
    2003, Microelectronics Reliability, (43) 7, p.1011-1020
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