Browsing by Author "Wang, Hua"

A global bus power optimization methodology for physical design of memory dominated systems by coupling bus segmentation and activity driven block placement

A system-level methodology for fully compensating process variability impact of memory organizations in periodic applications

A variability tolerant embedded SRAM offering runtime selectable energy/delay figures

Design and synthesis of Pareto buffers offering large range runtime energy/delay trade-offs via combined buffer size and supply voltage tuning

Impact of random soft oxide breakdown on SRAM energy/delay drift

Reliability issues in deep deep sub-micron technologies: time-dependent variability and its impact on embedded system design

Reliability issues in deep deep sub-micron technologies: time-dependent variability and its impact on embedded system design

Sub-THz and THz signal generation using photonic and electronic techniques

Synthesis of runtime switchable pareto buffers offering full range fine grained energy/delay trade-offs

Systematic analysis of energy and delay impact of very deep submicron process variability effects in embedded SRAM modules

Variable tapered pareto buffer design and implementation allowing run-time configuration for low power embedded SRAMs

Word and decoder organization exploration methodology for the generation of energy and delay trade-offs in embedded SRAMs